using xilinx DCM (we have to generate 50 Mhz clock cfr gameduino, from a 16Mhz external osc)
- Xilinx app note 462 documents DCM for spartan 3
- xc3s400a (our dev board) has 4 dcms - so that's plenty (gameduino uses one to convert 50Mhz clock to 25Mhz VGA pixelclock)
- dcm-wizard generates a template for component inclusion with right paramaters
 synthesize verilog code
- http://excamera.com/files/gameduino/ (contains tools and xilinx project files etc)
- http://excamera.com/files/xilinx-sample/ minimal makefile
i get gameduino compiled for the specific fpga it's written for (xc3s200a-4vq100) our dev-board (xc3s400a-5ft256) is not happy with it...
Checking expanded design ... ERROR:NgdBuild:604 - logical block 'ICAP_SPARTAN3A_inst' with type 'ICAP_SPARTAN3A' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'ICAP_SPARTAN3A' is not supported in target 'spartan3'.
reason: typo in makefile !!! duh
there's no problem with this, but investigate the block memory config (.bmm) -- study material : xilinx spartan3a user guide (ug331.pdf), chapter 4, 'using block ram'